3D chips engineered by MIT scientists soar skyward, equivalent to multi-story buildings
Here's a revamped, informal, and engaging version of the article:
Stacking Chips, Ditching Silicon
The electronics industry is hitting a roadblock in packing more transistors onto computer chips. So, they're thinking vertically — building multilayered chips, akin to turning a ranch house into a skyscraper. These bad boys could handle way more data and take on vastly more complex functions than your everyday gadgets.
But there's a rub — building these multilayered wonders over bulky silicon wafers slow things down. Communication between the layers takes a hit because each layer needs a thick silicon "flooring." Say goodbye to that!
MIT engineers came up with a sneaky way round this issue. In a study published in Nature, they report making a multilayered chip without the need for silicon wafer substrates, and it operates at cold enough temperatures to preserve the circuitry below.
To create their chip, the team used a fabrication method that lets engineers grow high-performance transistors and components directly on any crystalline surface — not just bulky silicon scaffolds. This means better, faster communication and computation between the layers. Cheers to that!
The researchers envision this method could pave the way for building AI hardware, like stacked chips for laptops or wearable devices. They reckon this tech could be as fast and powerful as today's supercomputers and store data on a scale with physical data centers.
Associate professor Jeehwan Kim, a study author, shares his excitement: "This breakthrough opens up enormous potential for the semiconductor industry, allowing chips to be stacked without traditional limitations. It could lead to orders-of-magnitude improvements in computing power for applications in AI, logic, and memory."
For the speed demons among us, here's a tad of the science bits:
In 2023, Kim's group unveiled a method for growing high-quality semiconducting materials on amorphous surfaces. They crafted 2D materials called transition-metal dichalcogenides (TMDs) — considered a promising successor to silicon for making smaller, high-performance transistors. To encourage the atoms to tailor themselves into high-quality, single-crystalline form, Kim and his colleagues first covered a silicon wafer in a super-thin silicon dioxide film. They patterned this film with tiny openings, or pockets, and fed atoms into these pockets as "seeds" to grow in single-crystalline patterns.
They've refined this method to grow single-crystalline 2D materials at temperatures low enough to preserve any underlying circuitry. The team discovered a surprising solution from metallurgy: growing seeds at the edges of the pockets requires less heat, and thus, can accomplish this at lower temperatures. Neat, huh?
Go ahead and dream about what this breakthrough could mean. Imagine AI chips stacked in your laptop or smartwatch... wicked fast and as powerful as today's supercomputers. Could game changer be an understatement?
Tiny Details
In 2023, Kim's team developed a method to grow high-quality semiconducting materials on amorphous surfaces. They crafted 2D materials called transition-metal dichalcogenides (TMDs) — considered a promising successor to silicon for making smaller, high-performance transistors. To encourage the atoms to align in a single-crystalline pattern, they covered a silicon wafer with a very thin silicon dioxide film and patterned it with tiny openings, or pockets. They released a gas of atoms over the mask, and the atoms settled in the pockets. Covering the wafer with a thin, patterned silicon dioxide mask helped confine the atoms into well-ordered, single-crystalline patterns. At the time, the method only worked at temperatures around 900 degrees Celsius.
The team then worked on refining their method to grow single-crystalline 2D materials at temperatures low enough to preserve any underlying circuitry. They employed a method found in metallurgy — growing crystals at the edges of the pockets requires less energy and heat. Thus, edge seeds could grow into single-crystalline material at temperatures as low as 380 degrees Celsius. Center seeds, on the other hand, required higher temperatures to grow into single-crystalline form.
Using this new method, they created a multilayered chip with alternating layers of two distinct TMDs — molybdenum disulfide and tungsten diselenide. Both materials are promising for making different types of transistors. The researchers could grow both materials in single-crystalline form, directly on top of each other, without the need for intermediate silicon wafers. This method doubles the density of the chip's semiconducting elements, particularly metal-oxide semiconductor (CMOS), which is a basic building block of modern logic circuitry.
- The MIT engineers' research, published in a journal, reported the creation of a multilayered chip without the need for silicon wafer substrates, a breakthrough in the electronics industry.
- This method of fabricating multilayered chips, pioneered by the MIT team, allows engineers to grow high-performance transistors and components directly on any crystalline surface, not just bulky silicon scaffolds.
- The science behind this innovation involves the growth of 2D materials called transition-metal dichalcogenides (TMDs), which are considered a promising successor to silicon for making smaller, high-performance transistors.
- In the revamped article, the news of this technology was emphasized as crucial for the future of AI hardware, potentially leading to laptop chips or wearable devices as fast and powerful as today's supercomputers.
- The breakthrough in growing single-crystalline 2D materials at lower temperatures, as reported by Jeehwan Kim and his colleagues, opens up enormous potential for the semiconductor industry, allowing chips to be stacked without traditional limitations.
- As the team refined their method, they discovered that growing seeds at the edges of pockets requires less heat, enabling the growth of single-crystalline material at temperatures as low as 380 degrees Celsius, a significant advantage in preserving underlying circuitry.
